H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 268

• Manufacturer Part Number: H8S-2350
• Description: 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 7 DMA Controller (DMAC)
Operation in each mode is summarized below.
(1) Sequential mode
In response to a single transfer request, the specified number of transfers are carried out, one byte
or one word at a time. An interrupt request can be sent to the CPU or DTC when the specified
number of transfers have been completed. One address is specified as 24 bits, and the other as 16
bits. The transfer direction is programmable.
(2) Idle mode
In response to a single transfer request, the specified number of transfers are carried out, one byte
or one word at a time. An interrupt request can be sent to the CPU or DTC when the specified
number of transfers have been completed. One address is specified as 24 bits, and the other as 16
bits. The transfer source address and transfer destination address are fixed. The transfer direction
is programmable.
(3) Repeat mode
In response to a single transfer request, the specified number of transfers are carried out, one byte
or one word at a time. When the specified number of transfers have been completed, the addresses
and transfer counter are restored to their original settings, and operation is continued. No interrupt
request is sent to the CPU or DTC. One address is specified as 24 bits, and the other as 16 bits.
The transfer direction is programmable.
(4) Single address mode
In response to a single transfer request, the specified number of transfers are carried out between
external memory and an external device, one byte or one word at a time. Unlike dual address
mode, source and destination accesses are performed in parallel. Therefore, either the source or the
destination is an external device which can be accessed with a strobe alone, using the DACK pin.
One address is specified as 24 bits, and for the other, the pin is set automatically. The transfer
direction is programmable.
Modes (1), (2) and (3) can also be specified for single address mode.
Rev. 3.00 Sep 15, 2006 page 234 of 988
REJ09B0330-0300