H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 295

• Manufacturer Part Number: H8S-2350
• Description: 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 7 DMA Controller (DMAC)
Activation by Auto-Request
Auto-request activation is performed by register setting only, and transfer continues to the end.
With auto-request activation, cycle steal mode or burst mode can be selected.
In cycle steal mode, the DMAC releases the bus to another bus master each time a byte or word is
transferred. DMA and CPU cycles usually alternate.
In burst mode, the DMAC keeps possession of the bus until the end of the transfer, and transfer is
performed continuously.
Single Address Mode
The DMAC can operate in dual address mode in which read cycles and write cycles are separate
cycles, or single address mode in which read and write cycles are executed in parallel.
In dual address mode, transfer is performed with the source address and destination address
specified separately.
In single address mode, on the other hand, transfer is performed between external space in which
either the transfer source or the transfer destination is specified by an address, and an external
device for which selection is performed by means of the DACK strobe, without regard to the
address. Figure 7.17 shows the data bus in single address mode.
Rev. 3.00 Sep 15, 2006 page 261 of 988
REJ09B0330-0300