H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 350

• Manufacturer Part Number: H8S-2350
• Description: 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 8 Data Transfer Controller (DTC)
Table 8.9
The number of execution states is calculated from the formula below. Note that
of all transfers activated by one activation event (the number in which the CHNE bit is set to 1,
plus 1).
For example, when the DTC vector address table is located in on-chip ROM, normal mode is set,
and data is transferred from the on-chip ROM to an internal I/O register, the time required for the
DTC operation is 13 states. The time from activation to the end of the data write is 10 states.
Rev. 3.00 Sep 15, 2006 page 316 of 988
REJ09B0330-0300
Bus width
Access states
Execution
status
Object to be Accessed
Number of execution states = I · S
Vector read
Register information
read/write
Byte data read
Word data read
Byte data write
Word data write
Internal operation
Number of States Required for Each Execution Status
S
S
S
S
S
S
S
I
J
K
K
L
L
M
Chip
RAM
On-
32
—
1
1
1
1
1
1
I
+
ROM
Chip
On-
16
—
1
1
1
1
1
1
(J · S
J
On-Chip I/O
+ K · S
Registers
—
—
2
8
2
4
2
4
K
16
—
—
+ L · S
2
2
2
2
2
1
L
—
2
2
4
2
4
) + M · S
4
External Devices
8
6+2m
6+2m
6+2m
3+m
3+m
—
3
M
means the sum
—
2
2
2
2
2
2
16
3+m
3+m
3+m
3+m
3+m
—
3