H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 853

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H8S-2350

Manufacturer Part Number
H8S-2350
Description
16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
TMDR3—Timer Mode Register 3
Bit
Initial value
Read/Write
:
:
:
7
1
6
1
Buffer Operation B
BFB
R/W
0
1
5
0
TGRB operates normally
TGRB and TGRD used together
for buffer operation
BFA
R/W
Buffer Operation A
4
0
0
1
TGRA operates normally
TGRA and TGRC used together
for buffer operation
MD3
R/W
H'FE81
3
0
Rev. 3.00 Sep 15, 2006 page 819 of 988
MD2
R/W
Legend: *: Don’t care
Notes: 1.
Mode
2
0
0
1
Appendix B Internal I/O Register
0
1
*
2.
MD3 is a reserved bit. In a write,
it should always be written with 0.
Phase counting mode cannot be
set for channels 0 and 3. In this
case, 0 should always be written
to MD2.
MD1
0
1
0
1
*
R/W
1
0
0
1
0
1
0
1
0
1
*
Normal operation
Reserved
PWM mode 1
PWM mode 2
Phase counting mode 1
Phase counting mode 2
Phase counting mode 3
Phase counting mode 4
REJ09B0330-0300
MD0
R/W
0
0
TPU3

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