H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 315

• Manufacturer Part Number: H8S-2350
• Description: 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

When DMA cycle reads or writes are accesses to on-chip memory or internal I/O registers, these
DMA cycles can be executed at the same time as refresh cycles or external bus release. However,
simultaneous operation may not be possible when a write buffer is used.
7.5.15
When an NMI interrupt is requested, burst mode transfer in full address mode is interrupted. An
NMI interrupt does not affect the operation of the DMAC in other modes.
In full address mode, transfer is enabled for a channel when both the DTE bit and the DTME bit
are set to 1. With burst mode setting, the DTME bit is cleared when an NMI interrupt is requested.
If the DTME bit is cleared during burst mode transfer, the DMAC discontinues transfer on
completion of the 1-byte or 1-word transfer in progress, then releases the bus, which passes to the
CPU.
The channel on which transfer was interrupted can be restarted by setting the DTME bit to 1 again.
Figure 7.36 shows the procedure for continuing transfer when it has been interrupted by an NMI
interrupt on a channel designated for burst mode transfer.
Figure 7.36 Example of Procedure for Continuing Transfer on Channel Interrupted by
transfer on interrupted
NMI Interrupts and DMAC
Transfer continues
Set DTME bit to 1
Resumption of
DTME = 0
channel
DTE = 1
Yes
No
[1]
[2]
NMI Interrupt
Transfer ends
Rev. 3.00 Sep 15, 2006 page 281 of 988
Section 7 DMA Controller (DMAC)
[1]
[2]
Check that DTE = 1 and
DTME = 0 in DMABCRL
Write 1 to the DTME bit.
REJ09B0330-0300