R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 1023

KIT DEV FOR SH7203

R0K572030S000BE

Manufacturer Part Number
R0K572030S000BE
Description
KIT DEV FOR SH7203
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K572030S000BE

Contents
CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
Silicon Manufacturer
Renesas
Kit Contents
Board
Silicon Family Name
SH7203
Silicon Core Number
R5S72030W200FP
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Mcu Supported Families
SH7203
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
SH7203
Lead Free Status / Rohs Status
Compliant
Section 19 Controller Area Network (RCAN-TL1)
• Halt mode
When RCAN-TL1 is in Halt mode, it cannot take part to the CAN bus activity. Consequently the
user can modify all the requested registers without influencing existing traffic on the CAN Bus. It
is important for this that the user waits for the RCAN-TL1 to be in halt mode before to modify the
requested registers - note that the transition to Halt Mode is not always immediate (transition will
occurs when the CAN Bus is idle or in intermission). After RCAN-TL1 transit to Halt Mode,
GSR4 is set.
Once the configuration is completed the Halt request needs to be released. RCAN-TL1 will join
CAN Bus activity after the detection of 11 recessive bits on the CAN Bus.
• Sleep mode
When RCAN-TL1 is in sleep mode the clock for the main blocks of the IP is stopped in order to
reduce power consumption. Only the following user registers are clocked and can be accessed:
MCR, GSR, IRR and IMR. Interrupt related to transmission (TXACK and ABACK) and reception
(RXPR and RFPR) cannot be cleared when in sleep mode (as TXACK, ABACK, RXPR and
RFPR are not accessible) and must to be cleared beforehand.
Rev. 3.00 Sep. 28, 2009 Page 991 of 1650
REJ09B0313-0300

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