R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 1109

KIT DEV FOR SH7203

R0K572030S000BE

Manufacturer Part Number
R0K572030S000BE
Description
KIT DEV FOR SH7203
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K572030S000BE

Contents
CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
Silicon Manufacturer
Renesas
Kit Contents
Board
Silicon Family Name
SH7203
Silicon Core Number
R5S72030W200FP
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Mcu Supported Families
SH7203
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
SH7203
Lead Free Status / Rohs Status
Compliant
22.3.9
FLBSYTMR is a 32-bit readable/writable register that specifies the timeout time when the FRB
pin is busy.
Initial value:
Initial value:
Bit
31 to 20
19 to 0
R/W:
R/W:
Bit:
Bit:
Ready Busy Timeout Setting Register (FLBSYTMR)
R/W
31
15
Bit Name
RBTMOUT[19:0] All 0
R
0
0
-
R/W
30
14
R
0
0
-
R/W
29
13
R
0
0
-
R/W
28
12
R
0
0
-
Initial
Value
All 0
R/W
27
11
R
0
0
-
R/W
R/W
R
R/W
26
10
R
0
0
-
R/W
25
R
0
9
0
-
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Ready Busy Timeout
Specify timeout time (the number of Pφ clocks) in
busy state. When these bits are set to 0, timeout is
not generated.
Section 22 AND/NAND Flash Memory Controller (FLCTL)
RBTMOUT[15:0]
R/W
24
R
0
8
0
-
R/W
23
R
0
7
0
-
Rev. 3.00 Sep. 28, 2009 Page 1077 of 1650
R/W
22
R
0
6
0
-
R/W
21
R
0
5
0
-
R/W
20
R
0
4
0
-
R/W
R/W
19
0
3
0
RBTMOUT[19:16]
REJ09B0313-0300
R/W
R/W
18
0
2
0
R/W
R/W
17
0
1
0
R/W
R/W
16
0
0
0

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