R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 1211

KIT DEV FOR SH7203

R0K572030S000BE

Manufacturer Part Number
R0K572030S000BE
Description
KIT DEV FOR SH7203
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K572030S000BE

Contents
CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
Silicon Manufacturer
Renesas
Kit Contents
Board
Silicon Family Name
SH7203
Silicon Core Number
R5S72030W200FP
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Mcu Supported Families
SH7203
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
SH7203
Lead Free Status / Rohs Status
Compliant
Note:
If a zero-length packet has been received, the corresponding bit in BRDYSTS is set to 1 but data
in the corresponding packet cannot be read. The buffer should be cleared (BCLR = 1) after
clearing BRDYSTS.
With PIPE1 to PIPE7, if DMA transfer is performed in the reading direction, interrupts can be
generated in transfer units, by setting the BFRE bit in PIPECFG to 1.
Access
Direction
Write
* In non-continuous transfer (CNTMD = 0), “buffer full” means that the maximum packet
size of data has been received. In continuous transfer (CNTMD = 1), it means that the
buffer size of data has been received.
Transfer
Direction Pipe
Transmit
1 to 7
BFRE DBLB
0
1
1
Don't
care
Conditions under which BRDY Interrupts are
Generated
(1), (2), (3), (4) or (5) below:
(1) Software changes the direction of transfer
(2) Data is enabled to be transmitted by one of
(3) Transmission of data from one buffer is
(4) Software sets the ACLRM bit to 1 when
(5) Software sets the SCLR bit to 1 when there
Not generated
direction from receiving to transmitting.
(a) to (c) below, when there is no data
waiting to be transmitted in buffer:
(a) Buffer becomes full by writing data n
(b) Software sets the BVAL bit in
(c) Writing is completed in DMA transfer.
complete when there are data waiting to be
transmitted in both buffers
there are data waiting to be transmitted in
both buffers.
are data waiting to be transmitted in both
buffers.
Section 23 USB 2.0 Host/Function Module (USB)
times the maximum packet size (n = 1
during a non-continuous transfer).
DnFIFOCTR to 1 to enable the buffer to
transmit data.
Rev. 3.00 Sep. 28, 2009 Page 1179 of 1650
REJ09B0313-0300

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