R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 143

• Manufacturer Part Number: R0K572030S000BE
• Description: KIT DEV FOR SH7203
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572030S000BE

• Contents: CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
• Silicon Manufacturer: Renesas
• Kit Contents: Board
• Silicon Family Name: SH7203
• Silicon Core Number: R5S72030W200FP
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: SH7203
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: SH7203
• Lead Free Status / Rohs Status: Compliant

Table 4.3
Clock
Operating
Mode
0
1
2
FRQCR
Setting*
H'x003
H'x004
H'x005
H'x006
H'x104
H'x106
H'x205
H'x206
H'x215
H'x216
H'x003
H'x004
H'x005
H'x006
H'x104
H'x106
H'x205
H'x206
H'x215
H'x216
H'x003
H'x004
H'x005
H'x006
H'x104
H'x106
H'x205
Relationship between Clock Operating Mode and Frequency Range
1
PLL
Frequency
Multiplier
PLL
Circuit
ON (× 8)
ON (× 8)
ON (× 8)
ON (× 8)
ON (× 12)
ON (× 12)
ON (× 16)
ON (× 16)
ON (× 16)
ON (× 16)
ON (× 8)
ON (× 8)
ON (× 8)
ON (× 8)
ON (× 12)
ON (× 12)
ON (× 16)
ON (× 16)
ON (× 16)
ON (× 16)
ON (× 8)
ON (× 8)
ON (× 8)
ON (× 8)
ON (× 12)
ON (× 12)
ON (× 16)
Ratio of
Internal Clock
Frequencies
(I:B:P)*
8:4:2
8:4:4/3
8:4:1
8:4:2/3
12:4:2
12:4:1
16:4:2
16:4:4/3
8:4:2
8:4:4/3
4:2:1
4:2:2/3
4:2:1/2
4:2:1/3
6:2:1
6:2:1/2
8:2:1
8:2:2/3
4:2:1
4:2:2/3
2:1:1/2
2:1:1/3
2:1:1/4
2:1:1/6
3:1:1/2
3:1:1/4
4:1:1/2
2
Input Clock*
10 to 16.67
10 to 16.67
10 to 16.67
10 to 16.67
10 to 16.67
10 to 16.67
10 to 12.5
10 to 12.5
10 to 12.5
10 to 12.5
20 to 33.33
20 to 33.33
20 to 33.33
20 to 33.33
20 to 33.33
20 to 33.33
20 to 25
20 to 25
20 to 25
20 to 25
40 to 66.66
40 to 66.66
40 to 66.66
40 to 66.66
40 to 66.66
40 to 66.66
40 to 50
3
Output Clock
(CKIO Pin)
40 to 66.66
40 to 66.66
40 to 66.66
40 to 66.66
40 to 66.66
40 to 66.66
40 to 50
40 to 50
40 to 50
40 to 50
40 to 66.66
40 to 66.66
40 to 66.66
40 to 66.66
40 to 66.66
40 to 66.66
40 to 50
40 to 50
40 to 50
40 to 50
⎯
⎯
⎯
⎯
⎯
⎯
⎯
Selectable Frequency Range (MHz)
Rev. 3.00 Sep. 28, 2009 Page 111 of 1650
Section 4 Clock Pulse Generator (CPG)
Internal Clock
(Iφ)
80 to 133.36
80 to 133.36
80 to 133.36
80 to 133.36
120 to 200
120 to 200
160 to 200
160 to 200
80 to 100
80 to 100
80 to 133.36
80 to 133.36
80 to 133.36
80 to 133.36
120 to 200.0
120 to 200.0
160 to 200
160 to 200
80 to 100
80 to 100
80 to 133.36
80 to 133.36
80 to 133.36
80 to 133.36
120 to 200.0
120 to 200.0
160 to 200
Bus Clock (Bφ)
40 to 66.66
40 to 66.66
40 to 66.66
40 to 66.66
40 to 66.66
40 to 66.66
40 to 50
40 to 50
40 to 50
40 to 50
40 to 66.66
40 to 66.66
40 to 66.66
40 to 66.66
40 to 66.66
40 to 66.66
40 to 50
40 to 50
40 to 50
40 to 50
40 to 66.66
40 to 66.66
40 to 66.66
40 to 66.66
40 to 66.66
40 to 66.66
40 to 50
REJ09B0313-0300
Peripheral
Clock (Pφ)
20 to 33.33
13.33 to 22.22
10 to 16.67
6.67 to 11.11
20 to 33.33
10 to 16.67
20 to 25
13.33 to 16.67
20 to 25
13.33 to 16.67
20 to 33.33
13.33 to 22.22
10 to 16.67
6.67 to 11.11
20 to 33.33
10 to 16.67
20 to 25
13.33 to 16.67
20 to 25
13.33 to 16.67
20 to 33.33
13.33 to 22.22
10 to 16.67
6.67 to 11.11
20 to 33.33
10 to 16.67
20 to 25