R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 1338

• Manufacturer Part Number: R0K572030S000BE
• Description: KIT DEV FOR SH7203
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572030S000BE

• Contents: CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
• Silicon Manufacturer: Renesas
• Kit Contents: Board
• Silicon Family Name: SH7203
• Silicon Core Number: R5S72030W200FP
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: SH7203
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: SH7203
• Lead Free Status / Rohs Status: Compliant

Section 25 Pin Function Controller (PFC)
Table 25.6 Multiplexed Pins (Port F)
Rev. 3.00 Sep. 28, 2009 Page 1306 of 1650
REJ09B0313-0300
Setting
Register
PFCRH4
PFCRH3
PFCRH2
PFCRH1
PFCRL4
00
Function 1
(Related Module)
PF30 I/O (port)
PF29 I/O (port)
PF28 I/O (port)
PF27 I/O (port)
PF26 I/O (port)
PF25 I/O (port)
PF24 I/O (port)
PF23 I/O (port)
PF22 I/O (port)
PF21 I/O (port)
PF20 I/O (port)
PF19 I/O (port)
PF18 I/O (port)
PF17 I/O (port)
PF16 I/O (port)
PF15 I/O (port)
PF14 I/O (port)
PF13 I/O (port)
PF12 I/O (port)
01
Function 2
(Related Module)
AUDIO_CLK input (SSI) ⎯
SSIDATA3 I/O (SSI)
SSIWS3 I/O (SSI)
SSISCK3 I/O (SSI)
SSIDATA2 I/O (SSI)
SSIWS2 I/O (SSI)
SSISCK2 I/O (SSI)
SSIDATA1 I/O (SSI)
SSIWS1 I/O (SSI)
SSISCK1 I/O (SSI)
SSIDATA0 I/O (SSI)
SSIWS0 I/O (SSI)
SSISCK0 I/O (SSI)
FCE output (FLCTL)
FRB input (FLCTL)
NAF7 I/O (FLCTL)
NAF6 I/O (FLCTL)
NAF5 I/O (FLCTL)
NAF4 I/O (FLCTL)
Setting of Mode Bits (PFnMD[1:0])
10
Function 3
(Related Module)
⎯
⎯
⎯
⎯
⎯
⎯
LCD_VEPWC output
(LCDC)
LCD_VCPWC output
(LCDC)
LCD_CLK input (LCDC) ⎯
LCD_FLM output
(LCDC)
LCD_M_DISP output
(LCDC)
LCD_CL2 output
(LCDC)
LCD_CL1 output
(LCDC)
LCD_DON output
(LCDC)
LCD_DATA15 output
(LCDC)
LCD_DATA14 output
(LCDC)
LCD_DATA13 output
(LCDC)
LCD_DATA12 output
(LCDC)
11
Function 4
(Related Module)
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯