R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 1294

• Manufacturer Part Number: R0K572030S000BE
• Description: KIT DEV FOR SH7203
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572030S000BE

• Contents: CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
• Silicon Manufacturer: Renesas
• Kit Contents: Board
• Silicon Family Name: SH7203
• Silicon Core Number: R5S72030W200FP
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: SH7203
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: SH7203
• Lead Free Status / Rohs Status: Compliant

Section 24 LCD Controller (LCDC)
24.3.18 LCDC Power-Supply Sequence Period Register (LDPSPR)
LDPSPR controls the power supply circuit that provides power to the LCD module. The timing to
start outputting the timing signals to the LCD_VEPWC and LCD_VCPWC pins is specified.
Initial value:
Rev. 3.00 Sep. 28, 2009 Page 1262 of 1650
REJ09B0313-0300
Bit
15
14
13
12
11
10
9
8
R/W:
Bit:
ONA3
R/W
15
1
Bit Name
ONA3
ONA2
ONA1
ONA0
ONB3
ONB2
ONB1
ONB0
ONA2
R/W
14
1
ONA1
R/W
13
1
Initial
Value
1
1
1
1
0
1
1
0
ONA0
R/W
12
1
ONB3
R/W
11
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
ONB2
R/W
10
1
Description
LCDC Power-On Sequence Period
Set the period from LCD_VCPWC assertion to starting
output of the display data (LCD_DATA) and timing
signals (LCD_FLM, LCD_CL1, LCD_CL2, and
LCD_M_DISP) in the power-on sequence of the LCD
module in frame units.
Specify to the value of (the period)-1.
This period is the (a) period in figures 24.4 to 24.7,
Power-Supply Control Sequence and States of the LCD
Module.
LCDC Power-On Sequence Period
Set the period from starting output of the display data
(LCD_DATA) and timing signals (LCD_FLM, LCD_CL1,
LCD_CL2, and LCD_M_DISP) to the LCD_VEPWC
assertion in the power-on sequence of the LCD module
in frame units.
Specify to the value of (the period)-1.
This period is the (b) period in figures 24.4 to 24.7,
Power-Supply Control Sequence and States of the LCD
Module.
ONB1
R/W
9
1
ONB0 OFFE3 OFFE2 OFFE1 OFFE0 OFFF3 OFFF2 OFFF1 OFFF0
R/W
8
0
R/W
7
0
R/W
6
0
R/W
5
0
R/W
4
0
R/W
3
1
R/W
2
1
R/W
1
1
R/W
0
1