R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 417

KIT DEV FOR SH7203

R0K572030S000BE

Manufacturer Part Number
R0K572030S000BE
Description
KIT DEV FOR SH7203
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K572030S000BE

Contents
CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
Silicon Manufacturer
Renesas
Kit Contents
Board
Silicon Family Name
SH7203
Silicon Core Number
R5S72030W200FP
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Mcu Supported Families
SH7203
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
SH7203
Lead Free Status / Rohs Status
Compliant
Table 9.24 Number of Idle Cycles Inserted between Access Cycles to Different Memory
Figure 9.54 shows sample estimation of idle cycles between access cycles. In the actual operation,
the idle cycles may become shorter than the estimated value due to the write buffer effect or may
become longer due to internal bus idle cycles caused by stalling in the pipeline due to CPU
instruction execution or CPU register conflicts. Please consider these errors when estimating the
idle cycles.
Previous Cycle SRAM
SRAM
Burst ROM
(asynchronous)
MPX-I/O
Byte SRAM
(BAS = 0)
Byte SRAM
(BAS = 1)
SDRAM
SDRAM
(low-frequency
mode)
PCMCIA
Burst MPX
Burst ROM
(synchronous)
Types
0
0
1
0
1
1
1.5
0
0
0
Burst ROM
(Asynchronous)
0
0
1
0
1
1
1.5
0
0
0
MPX-
I/O
1
1
0
1
2
2
2.5
1
1
1
Byte
SRAM
(BAS =
0)
0
0
1
0
1
1
1.5
0
0
0
Byte
SRAM
(BAS =
1)
1
1
1
1
0
0
0.5
1
1
1
Next Cycle
SDRAM
1
1
1
1
0
0
1
1
1
Rev. 3.00 Sep. 28, 2009 Page 385 of 1650
SDRAM
(Low-
Frequency
Mode)
1.5
1.5
1.5
1.5
1.5
1
1.5
1.5
1.5
Section 9 Bus State Controller (BSC)
PCMCIA
0
0
1
0
1
1
1.5
0
0
0
Burst
MPX
0
0
1
0
1
1
1.5
0
0
0
REJ09B0313-0300
Burst ROM
(Synchronous)
0
0
1
0
1
1
1.5
0
0
0

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