R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 608

Manufacturer Part Number

R0K572030S000BE

KIT DEV FOR SH7203

Manufacturer

Renesas Electronics America

Renesas Starter Kits (RSK)r

CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM

Silicon Manufacturer

Kit Contents

Silicon Family Name

Silicon Core Number

R5S72030W200FP

Tool / Board Applications

General Purpose MCU, MPU, DSP, DSC

Mcu Supported Families

Lead Free Status / RoHS Status

Contains lead / RoHS non-compliant

For Use With/related Products

Lead Free Status / Rohs Status

Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)

In complementary PWM mode, 0% and 100% duty cycles can be output as required. Figures

11.49 to 11.53 show output examples.

100% duty output is performed when the data register value is set to H'0000. The waveform in this

case has a positive phase with a 100% on-state. 0% duty output is performed when the data

with a 100% off-state.

On and off compare-matches occur simultaneously, but if a turn-on compare-match and turn-off

compare-match for the same phase occur simultaneously, both compare-matches are ignored and

the waveform does not change.

In complementary PWM mode, toggle output can be performed in synchronization with the PWM

carrier cycle by setting the PSYE bit to 1 in the timer output control register (TOCR). An example

of a toggle output waveform is shown in figure 11.54.

This output is toggled by a compare-match between TCNT_3 and TGRA_3 and a compare-match

between TCNT4 and H'0000.

The output pin for this toggle output is the TIOC3A pin. The initial output is 1.

Rev. 3.00 Sep. 28, 2009 Page 576 of 1650

REJ09B0313-0300

Figure 11.54 Example of Toggle Output Waveform Synchronized with PWM Output

Complementary PWM Mode 0% and 100% Duty Output

Toggle Output Synchronized with PWM Cycle

Toggle output