R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 786

KIT DEV FOR SH7203

R0K572030S000BE

Manufacturer Part Number
R0K572030S000BE
Description
KIT DEV FOR SH7203
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K572030S000BE

Contents
CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
Silicon Manufacturer
Renesas
Kit Contents
Board
Silicon Family Name
SH7203
Silicon Core Number
R5S72030W200FP
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Mcu Supported Families
SH7203
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
SH7203
Lead Free Status / Rohs Status
Compliant
Section 15 Serial Communication Interface with FIFO (SCIF)
Table 15.8 Maximum Bit Rates with External Clock Input
15.3.9
SCFCR resets the quantity of data in the transmit and receive FIFO data registers, sets the trigger
data quantity, and contains an enable bit for loop-back testing. SCFCR can always be read and
written to by the CPU.
Initial value:
Rev. 3.00 Sep. 28, 2009 Page 754 of 1650
REJ09B0313-0300
Pφ (MHz)
8
16
24
28.7
30
33
Bit
15 to 11
R/W:
Bit:
FIFO Control Register (SCFCR)
Bit Name
15
R
0
-
(Clock Synchronous Mode, t
14
R
0
-
13
R
0
-
Initial
Value
All 0
12
R
0
-
External Input Clock (MHz)
0.6666
1.3333
2.0000
2.3916
2.5000
2.7500
11
R
0
-
R/W
R
R/W
10
0
RSTRG[2:0]
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Scyc
R/W
9
0
= 12t
R/W
8
0
pcyc
)
R/W
7
0
RTRG[1:0]
R/W
6
0
Maximum Bit Rate (bits/s)
666666.6
1333333.3
2000000.0
2391666.6
2500000.0
2750000.0
R/W
5
0
TTRG[1:0]
R/W
4
0
R/W
MCE
3
0
TFRST RFRST
R/W
2
0
R/W
1
0
LOOP
R/W
0
0

Related parts for R0K572030S000BE