R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 1650

• Manufacturer Part Number: R0K572030S000BE
• Description: KIT DEV FOR SH7203
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572030S000BE

• Contents: CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
• Silicon Manufacturer: Renesas
• Kit Contents: Board
• Silicon Family Name: SH7203
• Silicon Core Number: R5S72030W200FP
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: SH7203
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: SH7203
• Lead Free Status / Rohs Status: Compliant

Rev. 3.00 Sep. 28, 2009 Page 1618 of 1650
REJ09B0313-0300
Item
4.1 Features
Figure 4.1 Block
Diagram of Clock Pulse
Generator
Page
106
107
Revision (See Manual for Details)
Figure amended
Description amended
(1) Crystal Oscillator
The crystal oscillator is used in which the crystal resonator is
connected to the XTAL/EXTAL pin or USB_X1/USB_X2 pin.
One of them is selected according to the clock operating
mode.
(2) Divider 1
Divider 1 divides the output from the crystal oscillator or the
external clock input. The division ratio depends on the clock
operating mode.
(3) PLL Circuit
PLL circuit multiplies the frequency of the output from the
divider 1. The multiplication ratio is set by the frequency
control register.
(4) Divider 2
Divider 2 generates a clock signal whose operating
frequency can be used for the internal clock, the peripheral
clock, and the bus clock. The division ratio of the internal
clock and peripheral clock are set by the frequency control
register. The division ratio of the bus clock is determined by
the clock operating mode and the PLL multiplication ratio.
Divider 2
× 1
× 1/2
× 1/3
× 1/4
× 1/6
× 1/8
× 1/12
Internal clock
(Iφ, Max. 200 MHz)
Peripheral clock
(Pφ, Max. 33.33 MHz)
Bus clock
(Bφ = CKIO, Max. 66.66 MHz)