R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 83

KIT DEV FOR SH7203

R0K572030S000BE

Manufacturer Part Number
R0K572030S000BE
Description
KIT DEV FOR SH7203
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K572030S000BE

Contents
CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
Silicon Manufacturer
Renesas
Kit Contents
Board
Silicon Family Name
SH7203
Silicon Core Number
R5S72030W200FP
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Mcu Supported Families
SH7203
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
SH7203
Lead Free Status / Rohs Status
Compliant
2.1.4
For the nineteen 32-bit registers comprising general registers R0 to R14, control register GBR, and
system registers MACH, MACL, and PR, high-speed register saving and restoration can be carried
out using a register bank. The register contents are automatically saved in the bank after the CPU
accepts an interrupt that uses a register bank. Restoration from the bank is executed by issuing a
RESBANK instruction in an interrupt processing routine.
This LSI has 15 banks. For details, see the SH-2A, SH2A-FPU Software Manual and section 6.8,
Register Banks.
2.1.5
Table 2.1 lists the values of the registers after a reset.
Table 2.1
Classification
General registers
Control registers
System registers
Register Banks
Initial Values of Registers
Initial Values of Registers
Register
R0 to R14
R15 (SP)
SR
GBR, TBR
VBR
MACH, MACL, PR
PC
Initial Value
Undefined
Value of the stack pointer in the vector
address table
Bits I[3:0] are 1111 (H'F), BO and CS are
0, reserved bits are 0, and other bits are
undefined
Undefined
H'00000000
Undefined
Value of the program counter in the vector
address table
Rev. 3.00 Sep. 28, 2009 Page 51 of 1650
REJ09B0313-0300
Section 2 CPU

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