R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 1197

KIT DEV FOR SH7203

R0K572030S000BE

Manufacturer Part Number
R0K572030S000BE
Description
KIT DEV FOR SH7203
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K572030S000BE

Contents
CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
Silicon Manufacturer
Renesas
Kit Contents
Board
Silicon Family Name
SH7203
Silicon Core Number
R5S72030W200FP
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Mcu Supported Families
SH7203
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
SH7203
Lead Free Status / Rohs Status
Compliant
23.3.35 Pipe Timing Control Register (PIPEPERI)
PIPEPERI is a register that selects whether the buffer is flushed or not when an interval error
occurred during isochronous IN transfer, and sets the interval error detection interval for PIPE1
and PIPE2.
This register is initialized by a power-on reset or a software reset.
Initial value:
Bit
15 to 13 ⎯
12
R/W:
Bit:
Bit Name
IFIS
15
R
0
-
14
R
0
-
13
R
0
-
R/W
IFIS
12
Initial
Value
All 0
0
0
11
R
0
-
R/W
R
R/W
10
R
0
-
R
9
0
-
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Isochronous IN Buffer Flush
0: The buffer is not flushed
1: The buffer is flushed
This bit is valid only when isochronous transfer is
selected. Before using this bit, the following settings
are required:
When the IFIS bit is not used for transfer, the above
procedures are not required.
When the IFIS bit is not used for transfer, ACLRM
setting is not required.
When isochronous-IN transfer is started
(1) Set the IFIS bit to 1.
(2) Set the PID1 and PID0 bits in PIPEnCTR to
(3) Write transmit data to the Iso-IN PIPE FIFO
When isochronous-IN transfer is ended
(1) Clear the PID1 and PID0 bits to 00 (NAK).
(2) Set the ACLRM bit in PIPEnCTR to 1.
(3) Wait at least 100 ns.
(4) Clear the ACLRM bit to 0.
R
8
0
-
01 (BUF).
buffer.
Section 23 USB 2.0 Host/Function Module (USB)
R
7
0
-
Rev. 3.00 Sep. 28, 2009 Page 1165 of 1650
R
6
0
-
R
5
0
-
R
4
0
-
R
3
0
-
REJ09B0313-0300
R/W
2
0
IITV[2:0]
R/W
1
0
R/W
0
0

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