R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 569

Manufacturer Part Number

R0K572030S000BE

KIT DEV FOR SH7203

Manufacturer

Renesas Electronics America

Renesas Starter Kits (RSK)r

CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM

Silicon Manufacturer

Kit Contents

Silicon Family Name

Silicon Core Number

R5S72030W200FP

Tool / Board Applications

General Purpose MCU, MPU, DSP, DSC

Mcu Supported Families

Lead Free Status / RoHS Status

Contains lead / RoHS non-compliant

For Use With/related Products

Lead Free Status / Rohs Status

Figure 11.22 illustrates the operation when TCNT_1 and TCNT_2 have been cascaded and the

I2AE bit in TICCR has been set to 1 to include the TIOC2A pin in the TGRA_1 input capture

conditions. In this example, the IOA0 to IOA3 bits in TIOR_1 have selected the TIOC1A rising

edge for the input capture timing while the IOA0 to IOA3 bits in TIOR_2 have selected the

TIOC2A rising edge for the input capture timing.

Under these conditions, the rising edge of both TIOC1A and TIOC2A is used for the TGRA_1

input capture condition. For the TGRA_2 input capture condition, the TIOC2A rising edge is used.

Cascaded Operation Example (b)

TCNT_2 value

Figure 11.21 Cascaded Operation Example (a)

Figure 11.22 Cascaded Operation Example (b)

As I1AE in TICCR is 0, data is not captured in TGRA_2 at the TIOC1A input timing.

Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)

Rev. 3.00 Sep. 28, 2009 Page 537 of 1650

REJ09B0313-0300