R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 536

KIT DEV FOR SH7203

R0K572030S000BE

Manufacturer Part Number
R0K572030S000BE
Description
KIT DEV FOR SH7203
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K572030S000BE

Contents
CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
Silicon Manufacturer
Renesas
Kit Contents
Board
Silicon Family Name
SH7203
Silicon Core Number
R5S72030W200FP
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Mcu Supported Families
SH7203
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
SH7203
Lead Free Status / Rohs Status
Compliant
Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
Note:
11.3.17 Timer Output Control Register 1 (TOCR1)
TOCR1 is an 8-bit readable/writable register that enables/disables PWM synchronized toggle
output in complementary PWM mode/reset synchronized PWM mode, and controls output level
inversion of PWM output.
Rev. 3.00 Sep. 28, 2009 Page 504 of 1650
REJ09B0313-0300
Bit
0
Bit
7
6
5, 4
Note:
* The inactive level is determined by the settings in timer output control registers 1 and 2
Bit Name
OE3B
Bit Name
PSYE
*
(TOCR1 and TOCR2). For details, refer to section 11.3.17, Timer Output Control
Register 1 (TOCR1), and section 11.3.18, Timer Output Control Register 2 (TOCR2).
Set these bits to 1 to enable MTU2 output in other than complementary PWM or reset-
synchronized PWM mode. When these bits are set to 0, low level is output.
This bit can be set to 1 only once after a power-on reset. After 1 is written, 0 cannot be written to the bit.
Initial value:
Initial
Value
0
Initial
value
0
0
All 0
R/W:
Bit:
R
7
0
-
R/W
R/W
R/W
R
R/W
R
PSYE
R/W
6
0
Description
Master Enable TIOC3B
This bit enables/disables the TIOC3B pin MTU2 output.
0: MTU2 output is disabled (inactive level)*
1: MTU2 output is enabled
Description
Reserved
This bit is always read as 0. The write value should
always be 0.
PWM Synchronous Output Enable
This bit selects the enable/disable of toggle output
synchronized with the PWM period.
0: Toggle output is disabled
1: Toggle output is enabled
Reserved
These bits are always read as 0. The write value should
always be 0.
R
5
0
-
R
4
0
-
R/(W)* R/W
TOCL
3
0
TOCS
2
0
OLSN
R/W
1
0
OLSP
R/W
0
0

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