R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 337

Manufacturer Part Number

R0K572030S000BE

KIT DEV FOR SH7203

Manufacturer

Renesas Electronics America

Renesas Starter Kits (RSK)r

CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM

Silicon Manufacturer

Kit Contents

Silicon Family Name

Silicon Core Number

R5S72030W200FP

Tool / Board Applications

General Purpose MCU, MPU, DSP, DSC

Mcu Supported Families

Lead Free Status / RoHS Status

Contains lead / RoHS non-compliant

For Use With/related Products

Lead Free Status / Rohs Status

Section 9 Bus State Controller (BSC)

read in case of a 32-bit device, and 16 bits in case of a 16-bit device. When writing, only the WEn

signal for the byte to be written is asserted.

It is necessary to output the data that has been read using RD when a buffer is established in the

data bus. The RD/WR signal is in a read state (high output) when no access has been carried out.

Therefore, care must be taken when controlling the external data buffer, to avoid collision.

Figures 9.3 and 9.4 show the basic timings of normal space access. If the WM bit in CSnWCR is

cleared to 0, a Tnop cycle is inserted after the CSn space access to evaluate the external wait

(figure 9.3). If the WM bit in CSnWCR is set to 1, external waits are ignored and no Tnop cycle is

inserted (figure 9.4).

Note: * The waveform for DACKn is when active low is specified.

Figure 9.3 Continuous Access for Normal Space 1

Bus Width = 16 Bits, Longword Access, CSnWCR.WM Bit = 0

(Access Wait = 0, Cycle Wait = 0)

Rev. 3.00 Sep. 28, 2009 Page 305 of 1650

REJ09B0313-0300