R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 145

KIT DEV FOR SH7203

R0K572030S000BE

Manufacturer Part Number
R0K572030S000BE
Description
KIT DEV FOR SH7203
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K572030S000BE

Contents
CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
Silicon Manufacturer
Renesas
Kit Contents
Board
Silicon Family Name
SH7203
Silicon Core Number
R5S72030W200FP
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Mcu Supported Families
SH7203
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
SH7203
Lead Free Status / Rohs Status
Compliant
4.4
The clock pulse generator has the following registers.
Table 4.4
4.4.1
FRQCR is a 16-bit readable/writable register used to specify whether a clock is output from the
CKIO pin during normal operation mode, release of bus mastership, software standby mode and
standby mode cancellation. The register also specifies the frequency-multiplier of the PLL circuit
and the frequency division ratio for the internal clock and peripheral clock (Pφ). FRQCR is
accessed by word.
Initial value:
Bit
15
Register Name
Frequency control register
R/W:
Bit:
Register Descriptions
Frequency Control Register (FRQCR)
Bit Name
15
R
0
-
Register Configuration
CKOEN2
R/W
14
0
R/W
13
CKOEN[1:0]
0
Initial
Value
0
R/W
12
0
Abbreviation R/W
FRQCR
11
R
0
-
R/W
R
10
R
0
-
R/W
Description
Reserved
This bit is always read as 0. The write value should
always be 0.
R/W
9
0
STC[1:0]
R/W
8
0
Initial Value Address
H'0003
R
7
0
-
Rev. 3.00 Sep. 28, 2009 Page 113 of 1650
R
6
0
-
Section 4 Clock Pulse Generator (CPG)
R
-
5
0
H'FFFE0010 16
R/W
IFC
4
0
R
3
0
-
REJ09B0313-0300
R/W
2
0
Access Size
PFC[2:0]
R/W
1
1
R/W
0
1

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