R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 632

KIT DEV FOR SH7203

R0K572030S000BE

Manufacturer Part Number
R0K572030S000BE
Description
KIT DEV FOR SH7203
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K572030S000BE

Contents
CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
Silicon Manufacturer
Renesas
Kit Contents
Board
Silicon Family Name
SH7203
Silicon Core Number
R5S72030W200FP
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Mcu Supported Families
SH7203
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
SH7203
Lead Free Status / Rohs Status
Compliant
Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
Note: This table shows the initial state immediately after a reset. The relative channel priorities
(1)
An interrupt is requested if the TGIE bit in TIER is set to 1 when the TGF flag in TSR is set to 1
by the occurrence of a TGR input capture/compare match on a particular channel. The interrupt
request is cleared by clearing the TGF flag to 0. The MTU2 has eighteen input capture/compare
match interrupts, six for channel 0, four each for channels 3 and 4, and two each for channels 1
and 2. The TGFE_0 and TGFF_0 flags in channel 0 are not set by the occurrence of an input
capture.
(2)
An interrupt is requested if the TCIEV bit in TIER is set to 1 when the TCFV flag in TSR is set to
1 by the occurrence of TCNT overflow on a channel. The interrupt request is cleared by clearing
the TCFV flag to 0. The MTU2 has five overflow interrupts, one for each channel.
(3)
An interrupt is requested if the TCIEU bit in TIER is set to 1 when the TCFU flag in TSR is set to
1 by the occurrence of TCNT underflow on a channel. The interrupt request is cleared by clearing
the TCFU flag to 0. The MTU2 has two underflow interrupts, one each for channels 1 and 2.
Rev. 3.00 Sep. 28, 2009 Page 600 of 1650
REJ09B0313-0300
Channel Name
3
4
Input Capture/Compare Match Interrupt
Overflow Interrupt
Underflow Interrupt
can be changed by the interrupt controller.
TGIA_3 TGRA_3 input capture/compare match
TGIB_3 TGRB_3 input capture/compare match
TGIC_3 TGRC_3 input capture/compare match
TGID_3 TGRD_3 input capture/compare match
TCIV_3 TCNT_3 overflow
TGIA_4 TGRA_4 input capture/compare match
TGIB_4 TGRB_4 input capture/compare match
TGIC_4 TGRC_4 input capture/compare match
TGID_4 TGRD_4 input capture/compare match
TCIV_4 TCNT_4 overflow/underflow
Interrupt Source
Interrupt
Flag
TGFA_3
TGFB_3
TGFC_3
TGFD_3
TCFV_3
TGFA_4
TGFB_4
TGFC_4
TGFD_4
TCFV_4
DMAC
Activation
Possible
Not possible
Not possible
Not possible
Not possible
Possible
Not possible
Not possible
Not possible
Not possible
Priority
High
Low

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