R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 30

KIT DEV FOR SH7203

R0K572030S000BE

Manufacturer Part Number
R0K572030S000BE
Description
KIT DEV FOR SH7203
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K572030S000BE

Contents
CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
Silicon Manufacturer
Renesas
Kit Contents
Board
Silicon Family Name
SH7203
Silicon Core Number
R5S72030W200FP
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Mcu Supported Families
SH7203
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
SH7203
Lead Free Status / Rohs Status
Compliant
Section 28 Power-Down Modes ......................................................................1397
28.1 Features............................................................................................................................ 1397
28.2 Register Descriptions ....................................................................................................... 1400
28.3 Operation ......................................................................................................................... 1423
28.4 Usage Notes ..................................................................................................................... 1434
Section 29 User Debugging Interface (H-UDI)...............................................1437
29.1 Features............................................................................................................................ 1437
29.2 Input/Output Pins............................................................................................................. 1438
29.3 Register Descriptions ....................................................................................................... 1439
29.4 Operation ......................................................................................................................... 1441
Rev. 3.00 Sep. 28, 2009 Page xxviii of xxx
REJ09B0313-0300
28.1.1
28.2.1
28.2.2
28.2.3
28.2.4
28.2.5
28.2.6
28.2.7
28.2.8
28.2.9
28.2.10 Deep Standby Control Register (DSCTR) ........................................................ 1415
28.2.11 Deep Standby Control Register 2 (DSCTR2) ................................................... 1417
28.2.12 Deep Standby Cancel Source Select Register (DSSSR) ................................... 1418
28.2.13 Deep Standby Cancel Source Flag Register (DSFR) ........................................ 1420
28.2.14 Retention On-Chip RAM Trimming Register (DSRTR) .................................. 1422
28.3.1
28.3.2
28.3.3
28.3.4
28.3.5
28.4.1
28.4.2
28.4.3
29.3.1
29.3.2
29.4.1
29.4.2
29.4.3
29.4.4
Power-Down Modes ......................................................................................... 1397
Standby Control Register (STBCR).................................................................. 1401
Standby Control Register 2 (STBCR2)............................................................. 1402
Standby Control Register 3 (STBCR3)............................................................. 1403
Standby Control Register 4 (STBCR4)............................................................. 1405
Standby Control Register 5 (STBCR5)............................................................. 1407
Standby Control Register 6 (STBCR6)............................................................. 1409
System Control Register 1 (SYSCR1) .............................................................. 1410
System Control Register 2 (SYSCR2) .............................................................. 1412
System Control Register 3 (SYSCR3) .............................................................. 1413
Sleep Mode ....................................................................................................... 1423
Software Standby Mode.................................................................................... 1424
Software Standby Mode Application Example................................................. 1427
Deep Standby Mode.......................................................................................... 1428
Module Standby Function................................................................................. 1434
Notes on Writing to Registers........................................................................... 1434
Notice about Deep Standby Control Register 2 (DSCTR2).............................. 1434
Notice about Power-On Reset Exception Handling.......................................... 1435
Bypass Register (SDBPR) ................................................................................ 1439
Instruction Register (SDIR) .............................................................................. 1439
TAP Controller ................................................................................................. 1441
Reset Configuration .......................................................................................... 1442
TDO Output Timing ......................................................................................... 1442
H-UDI Reset ..................................................................................................... 1443

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