R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 304

• Manufacturer Part Number: R0K572030S000BE
• Description: KIT DEV FOR SH7203
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572030S000BE

• Contents: CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
• Silicon Manufacturer: Renesas
• Kit Contents: Board
• Silicon Family Name: SH7203
• Silicon Core Number: R5S72030W200FP
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: SH7203
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: SH7203
• Lead Free Status / Rohs Status: Compliant

Section 9 Bus State Controller (BSC)
• CS4WCR
Initial value:
Initial value:
Rev. 3.00 Sep. 28, 2009 Page 272 of 1650
REJ09B0313-0300
Bit
6
5 to 0
Bit
31 to 22 ⎯
21, 20
R/W:
R/W:
Bit:
Bit:
Bit Name
WM
⎯
Bit Name
BST[1:0]
31
15
R
R
0
0
-
-
30
14
R
R
0
0
-
-
29
13
R
R
0
0
-
-
Initial
Value
0
All 0
Initial
Value
All 0
00
R/W
28
12
R
0
0
-
SW[1:0]
R/W
27
11
R
0
0
-
R/W
R/W
R
R/W
R
R/W
R/W
26
10
R
0
1
-
Description
External Wait Mask Specification
Specifies whether or not the external wait input is
valid. The specification by this bit is valid even when
the number of access wait cycle is 0.
0: External wait input is valid
1: External wait input is ignored
Reserved
These bits are always read as 0. The write value
should always be 0.
R/W
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Burst Count Specification
Specify the burst count for 16-byte access. These bits
must not be set to B'11.
Bus Width
8 bits
16 bits
32 bits
25
R
0
9
0
-
W[3:0]
R/W
24
R
0
8
1
-
R/W
23
R
0
7
0
-
BST[1:0]
00
01
00
01
10
xx
R/W
WM
22
R
0
6
0
-
R/W
21
R
0
5
0
-
BST[1:0]
R/W
20
R
0
4
0
-
Burst count
16 burst × one time
4 burst × four times
8 burst × one time
2 burst × four times
4-4 or 2-4-2 burst
4 burst × one time
19
R
R
0
3
0
-
-
18
R
R
0
2
0
-
-
R/W
R/W
17
0
1
0
BW[1:0]
HW[1:0]
R/W
R/W
16
0
0
0