R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 754

KIT DEV FOR SH7203

R0K572030S000BE

Manufacturer Part Number
R0K572030S000BE
Description
KIT DEV FOR SH7203
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K572030S000BE

Contents
CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
Silicon Manufacturer
Renesas
Kit Contents
Board
Silicon Family Name
SH7203
Silicon Core Number
R5S72030W200FP
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Mcu Supported Families
SH7203
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
SH7203
Lead Free Status / Rohs Status
Compliant
Section 15 Serial Communication Interface with FIFO (SCIF)
• Four types of interrupts: Transmit-FIFO-data-empty interrupt, break interrupt, receive-FIFO-
• When the SCIF is not in use, it can be stopped by halting the clock supplied to it, saving
• In asynchronous mode, on-chip modem control functions (RTS and CTS) (only channel 3).
• The quantity of data in the transmit and receive FIFO data registers and the number of receive
• A time-out error (DR) can be detected when receiving in asynchronous mode.
• In asynchronous mode, the base clock frequency can be either 16 or 8 times the bit rate.
• When an internal clock is selected as a clock source and the SCK pin is used as an input pin in
Rev. 3.00 Sep. 28, 2009 Page 722 of 1650
REJ09B0313-0300
data-full interrupt, and receive-error interrupts are requested independently.
power.
errors of the receive data in the receive FIFO data register can be ascertained.
asynchronous mode, either normal mode or double-speed mode can be selected for the baud
rate generator.

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