R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 1442

• Manufacturer Part Number: R0K572030S000BE
• Description: KIT DEV FOR SH7203
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572030S000BE

• Contents: CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
• Silicon Manufacturer: Renesas
• Kit Contents: Board
• Silicon Family Name: SH7203
• Silicon Core Number: R5S72030W200FP
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: SH7203
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: SH7203
• Lead Free Status / Rohs Status: Compliant

Section 28 Power-Down Modes
28.2.7
SYSCR1 is an 8-bit readable/writable register that enables or disables access to the on-chip RAM
(high-speed). Only byte access is valid.
When an RAME bit is set to 1, the corresponding on-chip RAM (high-speed) area is enabled.
When an RAME bit is cleared to 0, the corresponding on-chip RAM (high-speed) area cannot be
accessed. In this case, an undefined value is returned when reading data or fetching an instruction
from the on-chip RAM (high-speed), and writing to the on-chip RAM (high-speed) is ignored. The
initial value of an RAME bit is 1.
Note that when clearing the RAME bit to 0 to disable the on-chip RAM (high-speed), be sure to
execute an instruction to read from or write to the same arbitrary address in each page before
setting the RAME bit. If such an instruction is not executed, the data last written to each page may
not be written to the on-chip RAM (high-speed). Furthermore, an instruction to access the on-chip
RAM (high-speed) should not be located immediately after the instruction to write to SYSCR1. If
an on-chip RAM (high-speed) access instruction is set, normal access is not guaranteed.
When setting the RAME bit to 1 to enable the on-chip RAM (high-speed), an instruction to read
SYSCR1 should be located immediately after the instruction to write to SYSCR1. If an instruction
to access the on-chip RAM (high-speed) is located immediately after the instruction to write to
SYSCR1, normal access is not guaranteed.
Note: When writing to this register, see section 28.4, Usage Notes.
Rev. 3.00 Sep. 28, 2009 Page 1410 of 1650
REJ09B0313-0300
Bit
3 to 1
0
System Control Register 1 (SYSCR1)
Bit Name
⎯
MSTP60
Initial
Value
All 1
1
R/W
R
R/W
Description
Reserved
These bits are always read as 1. The write value
should always be 1.
Module Stop 60
When the MSTP60 bit is set to 1, the supply of the
clock to the USB is halted.
0: USB runs.
1: Clock supply to USB is halted.