R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 1212

• Manufacturer Part Number: R0K572030S000BE
• Description: KIT DEV FOR SH7203
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572030S000BE

• Contents: CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
• Silicon Manufacturer: Renesas
• Kit Contents: Board
• Silicon Family Name: SH7203
• Silicon Core Number: R5S72030W200FP
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: SH7203
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: SH7203
• Lead Free Status / Rohs Status: Compliant

Section 23 USB 2.0 Host/Function Module (USB)
Table 23.13 Conditions for Clearing the BRDY Bit
Rev. 3.00 Sep. 28, 2009 Page 1180 of 1650
REJ09B0313-0300
BRDYM
0
1
(1) Zero-length packet reception or data packet reception when BFRE = 0
(2) Data packet reception when BFRE = 1 (short packet reception/transaction counter completion)
(3) Packet transmission
USB bus
USB bus
BRDY
interrupt
USB bus
BRDY
interrupt
BRDY
interrupt
(short packet reception/transaction counter completion/buffer full)
Figure 23.3 Timing at which a BRDY Interrupt Is Generated
Conditions for Clearing the BRDY Bit
When software clears all of the bits in BRDYSTS, this module clears the BRDY
bit in INSTS0.
When the BTST bits for all pipes are cleared to 0, this module clears the BRDY
bit in INTSTS0.
Token packet
Token packet
Buffer write
Token packet
Zero-length packet/
(transaction count)
Short data packet/
(transaction count)
short data packet/
data packet (full)
A BRDY interrupt is generated
because reading from the buffer
is enabled.
data packet
A BRDY interrupt is generated
because the transfer has ended
A BRDY interrupt is generated
because writing to the buffer is enabled.
Data packet
ACK handshake
ACK handshake
ACK handshake
Buffer read