R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 1200

• Manufacturer Part Number: R0K572030S000BE
• Description: KIT DEV FOR SH7203
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572030S000BE

• Contents: CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
• Silicon Manufacturer: Renesas
• Kit Contents: Board
• Silicon Family Name: SH7203
• Silicon Core Number: R5S72030W200FP
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: SH7203
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: SH7203
• Lead Free Status / Rohs Status: Compliant

Section 23 USB 2.0 Host/Function Module (USB)
Notes: 1. Reading of 0 and writing of 1 are valid.
Rev. 3.00 Sep. 28, 2009 Page 1168 of 1650
REJ09B0313-0300
Bit
9
8
7
6
5 to 2
1, 0
2. If the SQCLR and SQSET bits in this register and DCPCTR are being used to change
3. The SQCLR bit and SQSET bits should not be set to 1 at the same time. Before
Bit Name
ACLRM
SQCLR
SQSET
SQMON
⎯
PID
the data PID sequence toggle bit for several pipes in succession, an access cycle of
120 ns and 5- or more bus clock cycles is required.
operating either bit, PID = NAK should be set. If isochronous transfer is set for the
transfer type (TYPE = 11), writing to the SQSET bit is invalid.
Initial
Value
0
0
0
0
All 0
00
R/W
R/W
R/W*
R/W*
R
R
R/W
1
1
Description
Auto Buffer Clear Mode
0: Disabled
1: Enabled (all buffers are initialized)
ACLRM = 1 should not be set for the pipe which has
been selected by the CURPIPE bits in
CFIFOSEL/DnFIFOSEL.
Toggle Bit Clear*
0: Invalid
1: Specifies DATA0
Toggle Bit Set*
0: Invalid
1: Specifies DATA1
Toggle Bit Confirmation
0: DATA0
1: DATA1
Reserved
These bits are always read as 0. The write value
should always be 0.
Response PID*
00: NAK response
01: BUF response (depending on the buffer state)
10: STALL response
11: STALL response
When the host controller function is selected and PID
is not set to BUF, no token is issued. If a transfer
error is detected, the controller sets the PID bits to
end the transfer.
2
3
*
3
2
*
3