R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 977

• Manufacturer Part Number: R0K572030S000BE
• Description: KIT DEV FOR SH7203
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572030S000BE

• Contents: CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
• Silicon Manufacturer: Renesas
• Kit Contents: Board
• Silicon Family Name: SH7203
• Silicon Core Number: R5S72030W200FP
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: SH7203
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: SH7203
• Lead Free Status / Rohs Status: Compliant

Bit 2 — Message Transmission in progress Flag (GSR2): Flag that indicates to the CPU if the
RCAN-TL1 is in Bus Off or transmitting a message or an error/overload flag due to error detected
during transmission. The timing to set TXACK is different from the time to clear GSR2. TXACK
is set at the 7
messages ready to be transmitted. It is also set by arbitration lost, bus idle, reception, reset or halt
transition.
Bit 1—Transmit/Receive Warning Flag (GSR1): Flag that indicates an error warning.
Note: REC is incremented during Bus Off to count the recurrences of 11 recessive bits as
Bit 0—Bus Off Flag (GSR0): Flag that indicates that RCAN-TL1 is in the bus off state.
Note: Only the lower 8 bits of TEC are accessible from the user interface. The 9
Bit 2: GSR2
0
1
Bit 1: GSR1
0
1
Bit 0: GSR0
0
1
requested by the Bus Off recovery sequence. However the flag GSR1 is not set in Bus Off.
to GSR0.
th
bit of End Of Frame. GSR2 is set at the 3
Description
RCAN-TL1 is in Bus Off or a transmission is in progress
[Setting condition]
Not in Bus Off and no transmission in progress (Initial value)
Description
[Reset condition] When (TEC < 96 and REC < 96) or Bus Off (Initial value)
[Setting condition] When 96 ≤ TEC < 256 or 96 ≤ REC < 256
Description
[Reset condition]
Recovery from bus off state or after a HW or SW reset (Initial value)
[Setting condition] When TEC ≥ 256 (bus off state)
Section 19 Controller Area Network (RCAN-TL1)
rd
bit of intermission if there are no more
Rev. 3.00 Sep. 28, 2009 Page 945 of 1650
th
bit is equivalent
REJ09B0313-0300