R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 633

KIT DEV FOR SH7203

R0K572030S000BE

Manufacturer Part Number
R0K572030S000BE
Description
KIT DEV FOR SH7203
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K572030S000BE

Contents
CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
Silicon Manufacturer
Renesas
Kit Contents
Board
Silicon Family Name
SH7203
Silicon Core Number
R5S72030W200FP
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Mcu Supported Families
SH7203
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
SH7203
Lead Free Status / Rohs Status
Compliant
11.5.2
The DMAC can be activated by the TGRA input capture/compare match interrupt in each channel.
For details, see section 10, Direct Memory Access Controller (DMAC).
In the MTU2, a total of five TGRA input capture/compare match interrupts can be used as DMAC
activation sources, one each for channels 0 to 4.
11.5.3
The A/D converter can be activated by one of the following three methods in the MTU2. Table
11.56 shows the relationship between interrupt sources and A/D converter start request signals.
(1)
The A/D converter can be activated by the occurrence of a TGRA input capture/compare match in
each channel. In addition, if complementary PWM operation is performed while the TTGE2 bit in
TIER_4 is set to 1, the A/D converter can be activated at the trough of TCNT_4 count (TCNT_4 =
H'0000).
A/D converter start request signal TRGAN is issued to the A/D converter under either one of the
following conditions.
• When the TGFA flag in TSR is set to 1 by the occurrence of a TGRA input capture/compare
• When the TCNT_4 count reaches the trough (TCNT_4 = H'0000) during complementary
When either condition is satisfied, if A/D converter start signal TRGAN from the MTU2 is
selected as the trigger in the A/D converter, A/D conversion will start.
(2)
The A/D converter can be activated by generating A/D converter start request signal TRG0N
when a compare match occurs between TCNT_0 and TGRE_0 in channel 0.
When the TGFE flag in TSR2_0 is set to 1 by the occurrence of a compare match between
TCNT_0 and TGRE_0 in channel 0 while the TTGE2 bit in TIER2_0 is set to 1, A/D converter
start request TGR0N is issued to the A/D converter. If A/D converter start signal TGR0N from the
MTU2 is selected as the trigger in the A/D converter, A/D conversion will start.
match on a particular channel while the TTGE bit in TIER is set to 1
PWM operation while the TTGE2 bit in TIER_4 is set to 1
A/D Converter Activation by TGRA Input Capture/Compare Match or at TCNT_4
Trough in Complementary PWM Mode
A/D Converter Activation by Compare Match between TCNT_0 and TGRE_0
DMAC Activation
A/D Converter Activation
Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
Rev. 3.00 Sep. 28, 2009 Page 601 of 1650
REJ09B0313-0300

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