R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 353

KIT DEV FOR SH7203

R0K572030S000BE

Manufacturer Part Number
R0K572030S000BE
Description
KIT DEV FOR SH7203
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K572030S000BE

Contents
CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
Silicon Manufacturer
Renesas
Kit Contents
Board
Silicon Family Name
SH7203
Silicon Core Number
R5S72030W200FP
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Mcu Supported Families
SH7203
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
SH7203
Lead Free Status / Rohs Status
Compliant
Table 9.11 Relationship between BSZ[1:0], A2/3ROW[1:0], A2/3COL[1:0], and Address
Notes: 1. L/H is a bit used in the command specification; it is fixed at L or H according to the
BSZ
[1:0]
11 (32 bits)
Output Pin of
This LSI
A17
A16
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
Example of connected memory
64-Mbit product (512 Kwords × 32 bits × 4 banks, column 8 bits product): 1
16-Mbit product (512 Kwords × 16 bits × 2 banks, column 8 bits product): 2
2. Bank address specification
access mode.
Multiplex Output (1)-1
A2/3
ROW
[1:0]
00 (11 bits)
Row Address
Output Cycle
A25
A24
A23
A22*
A21*
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A9
A8
2
2
Setting
A2/3
COL
[1:0]
00 (8 bits)
Column Address
Output Cycle
A17
A16
A15
A22*
A21*
L/H*
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
1
2
2
SDRAM Pin
A12 (BA1)
A11 (BA0)
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
Rev. 3.00 Sep. 28, 2009 Page 321 of 1650
Section 9 Bus State Controller (BSC)
Function
Unused
Specifies bank
Specifies
address/precharge
Address
Unused
REJ09B0313-0300

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