R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 1140

• Manufacturer Part Number: R0K572030S000BE
• Description: KIT DEV FOR SH7203
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572030S000BE

• Contents: CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
• Silicon Manufacturer: Renesas
• Kit Contents: Board
• Silicon Family Name: SH7203
• Silicon Core Number: R5S72030W200FP
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: SH7203
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: SH7203
• Lead Free Status / Rohs Status: Compliant

Section 23 USB 2.0 Host/Function Module (USB)
Rev. 3.00 Sep. 28, 2009 Page 1108 of 1650
REJ09B0313-0300
Bit
8
7
6
Bit Name
WKUP
RWUPE
USBRST
Initial
Value
0
0
0
R/W
R/W
R/W
R/W
Description
Wakeup Output
This bit is used to control remote wakeup signal
output to the USB bus. The module controls the
output time of a remote wakeup signal. When this bit
is set to 1, this module clears this bit to 0 after
outputting the 10-ms K state.
According to the USB specification, the USB bus idle
state must be kept for 5 ms or longer before a
remote wakeup signal is output. If this module writes
1 to this bit right after detection of suspended state,
the K state will be output after 2 ms.
0: Outputs no signals
1: Outputs a remote wakeup signal
Note: Do not write 1 to this bit, unless the device
Wakeup Detection Enable
Outputs a resume signal to a down port when a
remote wakeup signal is detected, by setting this bit
to 1. At this time, this module sets the RESUME bit
to 1.
0: Down-port wakeup is disabled.
1: Down-port wakeup is enabled.
Note: In setting this bit to 1, do not stop the USBCLK
Bus Reset Output
Outputs a USB bus reset signal by setting this bit to
1. The USB bus reset signal output time should be
controlled by software. This bit should be cleared to
0 after the USB bus reset time has elapsed.
0: USB bus reset signal output is stopped.
1: USB bus reset signal is output.
state is in the suspended state (the DVSQ bit in
the INTSTS0 register is set to 1xx) and the
USB host enables the remote wakeup signal.
When this bit is set to 1, the USBCLK must not
be stopped even in the suspended state.
even in the suspended state.