R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 532

• Manufacturer Part Number: R0K572030S000BE
• Description: KIT DEV FOR SH7203
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572030S000BE

• Contents: CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
• Silicon Manufacturer: Renesas
• Kit Contents: Board
• Silicon Family Name: SH7203
• Silicon Core Number: R5S72030W200FP
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: SH7203
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: SH7203
• Lead Free Status / Rohs Status: Compliant

Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
11.3.14 Timer Synchronous Register (TSYR)
TSYR is an 8-bit readable/writable register that selects independent operation or synchronous
operation for the channel 0 to 4 TCNT counters. A channel performs synchronous operation when
the corresponding bit in TSYR is set to 1.
Rev. 3.00 Sep. 28, 2009 Page 500 of 1650
REJ09B0313-0300
Bit
7
6
5 to 3
Bit Name
SYNC4
SYNC3
—
Initial value:
Initial
Value
0
0
All 0
R/W:
Bit:
SYNC4 SYNC3
R/W
7
0
R/W
R/W
R/W
R
R/W
6
0
Description
Timer Synchronous operation 4 and 3
These bits are used to select whether operation is
independent of or synchronized with other channels.
When synchronous operation is selected, the TCNT
synchronous presetting of multiple channels, and
synchronous clearing by counter clearing on another
channel, are possible.
To set synchronous operation, the SYNC bits for at
least two channels must be set to 1. To set
synchronous clearing, in addition to the SYNC bit , the
TCNT clearing source must also be set by means of
bits CCLR0 to CCLR2 in TCR.
0: TCNT_4 and TCNT_3 operate independently (TCNT
1: TCNT_4 and TCNT_3 performs synchronous
Reserved
These bits are always read as 0. The write value should
always be 0.
R
5
0
-
presetting/clearing is unrelated to other channels)
operation
TCNT synchronous presetting/synchronous clearing
is possible
R
4
0
-
R
3
0
-
SYNC2 SYNC1 SYNC0
R/W
2
0
R/W
1
0
R/W
0
0