R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 296

• Manufacturer Part Number: R0K572030S000BE
• Description: KIT DEV FOR SH7203
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572030S000BE

• Contents: CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
• Silicon Manufacturer: Renesas
• Kit Contents: Board
• Silicon Family Name: SH7203
• Silicon Core Number: R5S72030W200FP
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: SH7203
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: SH7203
• Lead Free Status / Rohs Status: Compliant

Section 9 Bus State Controller (BSC)
• CS5WCR
Initial value:
Initial value:
Rev. 3.00 Sep. 28, 2009 Page 264 of 1650
REJ09B0313-0300
Bit
6
5 to 2
1, 0
R/W:
R/W:
Bit:
Bit:
31
15
R
R
0
0
Bit Name
WM
⎯
HW[1:0]
-
-
30
14
R
R
0
0
-
-
29
13
R
R
0
0
-
-
Initial
Value
0
All 0
00
R/W
28
12
R
0
0
-
SW[1:0]
R/W
27
11
R
0
0
-
R/W
R/W
R
R/W
R/W
26
10
R
0
1
-
Description
External Wait Mask Specification
Specifies whether or not the external wait input is valid.
The specification by this bit is valid even when the
number of access wait cycle is 0.
0: External wait input is valid
1: External wait input is ignored
Reserved
These bits are always read as 0. The write value
should always be 0.
Delay Cycles from RD, WEn Negation to Address, CS4
Negation
Specify the number of delay cycles from RD and WEn
negation to address and CS4 negation.
00: 0.5 cycles
01: 1.5 cycles
10: 2.5 cycles
11: 3.5 cycles
R/W
25
R
0
9
0
-
WR[3:0]
R/W
24
R
0
8
1
-
R/W
23
R
0
7
0
-
R/W
WM
22
R
0
6
0
-
SZSEL
R/W
21
R
0
5
0
-
MPXW/
R/W
BAS
20
R
0
4
0
-
19
R
R
0
3
0
-
-
R/W
18
R
0
2
0
-
WW[2:0]
R/W
R/W
17
0
1
0
HW[1:0]
R/W
R/W
16
0
0
0