R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 235

• Manufacturer Part Number: R0K572030S000BE
• Description: KIT DEV FOR SH7203
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572030S000BE

• Contents: CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
• Silicon Manufacturer: Renesas
• Kit Contents: Board
• Silicon Family Name: SH7203
• Silicon Core Number: R5S72030W200FP
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: SH7203
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: SH7203
• Lead Free Status / Rohs Status: Compliant

7.3.3
BDR is a 32-bit readable/writable register. The control bits CD[1:0] and CP[1:0] in the break bus
cycle register (BBR) select one of the three data buses for a break condition.
Notes: 1. Set the operand size when specifying a value on a data bus as the break condition.
Initial value:
Initial value:
Bit
31 to 0
R/W:
R/W:
Bit:
Bit:
2. When the byte size is selected as a break condition, the same byte data must be set in
Break Data Register (BDR)
Bit Name
BD31 to BD0 All 0
BD31
BD15
bits 31 to 24, 23 to 16, 15 to 8, and 7 to 0 in BDR as the break data. Similarly, when the
word size is selected, the same word data must be set in bits 31 to 16 and 15 to 0.
R/W
R/W
31
15
0
0
BD30
BD14
R/W
R/W
30
14
0
0
BD29
BD13
R/W
R/W
29
13
0
0
Initial
Value
BD28
BD12
R/W
R/W
28
12
0
0
BD27
BD11
R/W
R/W
27
11
0
0
R/W
R/W
BD26
BD10
R/W
R/W
26
10
0
0
Description
Break Data Bits
Store data which specifies a break condition.
When the C bus is selected by BBR, specify the break
data on MDB in bits BD31 to BD0.
When the internal CPU bus (I bus) is selected by BBR,
specify an ICDB address in bits BD31 to BD0.
When the internal DMA bus (I bus) is selected by BBR,
specify an IDDB address in bits BD31 to BD0.
BD25
R/W
R/W
BD9
25
0
9
0
BD24
R/W
R/W
BD8
24
0
8
0
BD23
R/W
R/W
BD7
23
0
7
0
Rev. 3.00 Sep. 28, 2009 Page 203 of 1650
BD22
R/W
R/W
BD6
22
0
6
0
Section 7 User Break Controller (UBC)
BD21
R/W
R/W
BD5
21
0
5
0
BD20
R/W
R/W
BD4
20
0
4
0
BD19
R/W
R/W
BD3
19
0
3
0
REJ09B0313-0300
BD18
R/W
R/W
BD2
18
0
2
0
BD17
R/W
R/W
BD1
17
0
1
0
BD16
R/W
R/W
BD0
16
0
0
0