MC912D60CCPVE Freescale Semiconductor, MC912D60CCPVE Datasheet - Page 114

• Manufacturer Part Number: MC912D60CCPVE
• Description: IC MCU 16BIT 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC912D60CCPVE

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: CAN, MI Bus, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x8/10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: HC912D
• Core: HC12
• Data Bus Width: 16 bit
• Data Ram Size: 2 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 86
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

EEPROM Memory
Technical Data
114
ERASE — Erase Control
EELAT — EEPROM Latch Control
EEPGM — Program and Erase Enable
Read anytime. Write anytime if EEPGM = 0.
Configures the EEPROM for erasure or programming.
Unless BULKP is set, erasure is by byte, aligned word, row or bulk.
Read anytime.
Write anytime except when EEPGM = 1 or EEDIV = 0.
BYTE, ROW, ERASE and EELAT bits can be written simultaneously
or in any sequence.
The EEPGM bit can be set only after EELAT has been set. When
EELAT and EEPGM are set simultaneously, EEPGM remains clear
but EELAT is set.
The BULKP, AUTO, BYTE, ROW, ERASE and EELAT bits cannot be
changed when EEPGM is set. To complete a program or erase cycle
when AUTO bit is clear, two successive writes to clear EEPGM and
EELAT bits are required before reading the programmed data.
When the AUTO bit is set, EEPGM is automatically cleared after the
program or erase cycle completes. Note that if an attempt is made to
modify a protected block location the modify cycle does not start and
the EEPGM bit isn’t automatically cleared.
A write to an EEPROM location has no effect when EEPGM is set.
Latched address and data cannot be modified during program or
erase.
0 = EEPROM configuration for programming.
1 = EEPROM configuration for erasure.
0 = EEPROM set up for normal reads.
1 = EEPROM address and data bus latches set up for
0 = Disables program/erase voltage to EEPROM.
1 = Applies program/erase voltage to EEPROM.
programming or erasing.
EEPROM Memory
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor