MC912D60CCPVE Freescale Semiconductor, MC912D60CCPVE Datasheet - Page 238

• Manufacturer Part Number: MC912D60CCPVE
• Description: IC MCU 16BIT 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC912D60CCPVE

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: CAN, MI Bus, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x8/10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: HC912D
• Core: HC12
• Data Bus Width: 16 bit
• Data Ram Size: 2 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 86
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Enhanced Capture Timer
TCTL3 — Timer Control Register 3
TCTL4 — Timer Control Register 4
Technical Data
238
RESET:
RESET:
EDG7B
EDG3B
Bit 7
Bit 7
0
0
EDG7A
EDG3A
6
0
6
0
Read or write anytime.
EDGnB, EDGnA — Input Capture Edge Control
To operate the 16-bit pulse accumulators A and B (PACA and PACB)
independently of input capture or output compare 7 and 0 respectively
the user must set the corresponding bits IOSn = 1, OMn = 0 and OLn
= 0. OC7M7 or OC7M0 in the OC7M register must also be cleared.
These eight pairs of control bits configure the input capture edge
detector circuits.
EDG6B
EDG2B
5
0
EDGnB
5
0
Table 14-2. Edge Detector Circuit Configuration
OMn
0
0
1
1
0
0
1
1
Table 14-1. Compare Result Output Action
Enhanced Capture Timer
EDG6A
EDG2A
4
0
EDGnA
4
0
OLn
0
1
0
1
0
1
0
1
EDG5B
EDG1B
Capture disabled
Capture on rising edges only
Capture on falling edges only
Capture on any edge (rising or falling)
3
0
3
0
Timer disconnected from output pin logic
Clear OCn output line to zero
Set OCn output line to one
EDG5A
EDG1A
Toggle OCn output line
2
0
2
0
Configuration
Action
EDG4B
EDG0B
MC68HC912D60A — Rev. 3.1
1
0
1
0
Freescale Semiconductor
EDG4A
EDG0A
Bit 0
Bit 0
0
0
$008A
$008B