MC912D60CCPVE Freescale Semiconductor, MC912D60CCPVE Datasheet - Page 215

IC MCU 16BIT 112-LQFP

MC912D60CCPVE

Manufacturer Part Number
MC912D60CCPVE
Description
IC MCU 16BIT 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC912D60CCPVE

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, MI Bus, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
68
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
HC912D
Core
HC12
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
86
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC912D60CCPVE
Manufacturer:
FREESCAL
Quantity:
203
Part Number:
MC912D60CCPVE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
PWPRES — PWM Prescale Counter
PWSCAL0 — PWM Scale Register 0
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
RESET:
RESET:
Bit 7
Bit 7
Bit 7
0
0
0
Bit 6
6
0
6
6
0
PWEN0 — PWM Channel 0 Enable
PWPRES is a free-running 7-bit counter. Read anytime. Write only in
special mode (SMOD = 1).
Read and write anytime. A write will cause the scaler counter PWSCNT0
to load the PWSCAL0 value unless in special mode with DISCAL = 1 in
the PWTST register.
PWM channels 0 and 1 can select clock S0 (scaled) as its input clock by
setting the control bit PCLK0 and PCLK1 respectively. Clock S0 is
generated by dividing clock A by the value in the PWSCAL0 register + 1
and dividing again by two. When PWSCAL0 = $FF, clock A is divided by
256 then divided by two to generate clock S0.
The pulse modulated signal will be available at port P, bit 0 when its
clock source begins its next cycle.
0 = Channel 0 is disabled.
1 = Channel 0 is enabled.
5
5
0
5
5
0
Pulse Width Modulator
4
4
0
4
4
0
3
3
0
3
3
0
2
2
0
2
2
0
1
1
0
1
1
0
PWM Register Description
Pulse Width Modulator
Bit 0
Bit 0
Bit 0
Bit 0
0
0
Technical Data
$0043
$0044
215

Related parts for MC912D60CCPVE