MC912D60CCPVE Freescale Semiconductor, MC912D60CCPVE Datasheet - Page 343

IC MCU 16BIT 112-LQFP

MC912D60CCPVE

Manufacturer Part Number
MC912D60CCPVE
Description
IC MCU 16BIT 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC912D60CCPVE

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, MI Bus, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
68
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
HC912D
Core
HC12
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
86
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MC912D60CCPVE
Manufacturer:
FREESCAL
Quantity:
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Part Number:
MC912D60CCPVE
Manufacturer:
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Quantity:
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17.13.12 msCAN12 Transmit Error Counter (CTXERR)
17.13.13 msCAN12 Identifier Acceptance Registers (CIDAR0–7)
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
CTXERR
$010F
RESET
W
R
NOTE:
TXERR7
Bit 7
0
This register reflects the status of the msCAN12 transmit error counter.
The register is read only.
Both error counters must only be read when in SLEEP or SOFT_RESET
mode.
On reception each message is written into the background receive
buffer. The CPU is only signalled to read the message however, if it
passes the criteria in the identifier acceptance and identifier mask
registers (accepted); otherwise, the message is overwritten by the next
message (dropped).
The acceptance registers of the msCAN12 are applied on the IDR0 to
IDR3 registers of incoming messages in a bit by bit manner.
For extended identifiers all four acceptance and mask registers are
applied. For standard identifiers only the first two (CIDMR0/1 and
CIDAR0/1) are applied.
TXERR6
6
0
TXERR5
5
0
MSCAN Controller
TXERR4
4
0
TXERR3
3
0
Programmer’s Model of Control Registers
TXERR2
2
0
TXERR1
1
0
MSCAN Controller
Technical Data
TXERR0
Bit 0
0
343

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