MC912D60CCPVE Freescale Semiconductor, MC912D60CCPVE Datasheet - Page 274

IC MCU 16BIT 112-LQFP

MC912D60CCPVE

Manufacturer Part Number
MC912D60CCPVE
Description
IC MCU 16BIT 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC912D60CCPVE

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, MI Bus, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
68
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
HC912D
Core
HC12
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
86
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC912D60CCPVE
Manufacturer:
FREESCAL
Quantity:
203
Part Number:
MC912D60CCPVE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Multiple Serial Interface
SC0SR2 — SCI Status Register 2
Technical Data
274
1. See
RESET:
Freescale Interconnect Bus
SCSWAI
Bit 7
0
MIE
6
0
PF — Parity Error Flag
Read anytime. Write has no meaning or effect.
SCSWAI — Serial Communications Interface Stop in WAIT Mode
RAF — Receiver Active Flag
(1)
Indicates if received data’s parity matches parity bit. This feature is
active only when parity is enabled. The type of parity tested for is
determined by the PT (parity type) bit in SCxCR1.
This bit is controlled by the receiver front end. It is set during the RT1
time period of the start bit search. It is cleared when an idle state is
detected or when the receiver circuitry detects a false start bit
(generally due to noise or baud rate mismatch).
If enabled with RIE = 1, RAF set generates an interrupt when
VDDPLL is high.
for descriptions of these bits.
0 = Parity correct
1 = Incorrect parity detected
0 = SCI clock operates normally.
1 = Halt SCI clock generation when in WAIT mode.
0 = A character is not being received
1 = A character is being received
MDL1
5
0
(1)
Multiple Serial Interface
MDL0
4
0
(1)
3
0
0
2
0
0
MC68HC912D60A — Rev. 3.1
1
0
0
Freescale Semiconductor
Bit 0
RAF
0
$00C5/$00CD

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