MC912D60CCPVE Freescale Semiconductor, MC912D60CCPVE Datasheet - Page 166

• Manufacturer Part Number: MC912D60CCPVE
• Description: IC MCU 16BIT 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC912D60CCPVE

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: CAN, MI Bus, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x8/10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: HC912D
• Core: HC12
• Data Bus Width: 16 bit
• Data Ram Size: 2 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 86
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Clock Functions
11.9 Computer Operating Properly (COP)
Technical Data
166
PCLK
Figure 11-9. Clock Chain for MSCAN, SPI, ATD0, ATD1 and BDM
÷
÷
÷
÷
÷
÷
÷
÷
2
2
2
2
2
2
2
2
BITS: SPR2, SPR1, SPR0
REGISTER: SP0BR
0:1:0
1:1:0
0:0:1
0:1:1
1:0:0
1:0:1
1:1:1
0:0:0
The COP or watchdog timer is an added check that a program is running
and sequencing properly. When the COP is being used, software is
responsible for keeping a free running watchdog timer from timing out. If
the watchdog timer times out it is an indication that the software is no
longer being executed in the intended sequence; thus a system reset is
initiated. Three control bits allow selection of seven COP time-out
periods. When COP is enabled, sometime during the selected period the
program must write $55 and $AA (in this order) to the COPRST register.
If the program fails to do this the part will reset. If any value other than
$55 or $AA is written, the part is reset.
COUNTER (PR0-PR4)
5-BIT MODULUS
SYSCLK
EXTALi
ECLK
BCLK
BIT RATE
SPI
Clock Functions
CLKSRC
SYNCHRONIZER
CLKSW
÷
LOGIC
BKGD
PIN
2
BKGD DIRECTION
BKGD OUT
BKGD IN
and ATD1
TO ATD0
BDM BIT CLOCK:
Receive: Detect falling edge,
count 12 ECLKs, Sample input
Transmit 1: Detect falling edge,
count 6 ECLKs while output is
high impedance, Drive out 1 E
cycle pulse high, high imped-
ance output again
Transmit 0: Detect falling edge,
Drive out low, count 9 ECLKs,
Drive out 1 E cycle pulse high,
high impedance output
MC68HC912D60A — Rev. 3.1
MSCAN
CLOCK
Freescale Semiconductor