MC912D60CCPVE Freescale Semiconductor, MC912D60CCPVE Datasheet - Page 90

• Manufacturer Part Number: MC912D60CCPVE
• Description: IC MCU 16BIT 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC912D60CCPVE

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: CAN, MI Bus, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x8/10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: HC912D
• Core: HC12
• Data Bus Width: 16 bit
• Data Ram Size: 2 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 86
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Bus Control and Input/Output
PEAR — Port E Assignment Register
Technical Data
90
RESET:
RESET:
RESET:
RESET:
RESET:
NDBE
BIT 7
0
0
1
1
0
CGMTE
6
0
0
1
0
0
PE[1:0] are associated with XIRQ and IRQ and cannot be configured as
outputs. These pins can be read regardless of whether the alternate
interrupt functions are enabled.
This register is not in the map in peripheral mode and expanded modes
while the EME control bit is set.
Read and write anytime.
The PEAR register is used to choose between the general-purpose I/O
functions and the alternate bus control functions of port E. When an
alternate control function is selected, the associated DDRE bits are
overridden.
The reset condition of this register depends on the mode of operation
because bus-control signals are needed immediately after reset in some
modes.
In normal single-chip mode, no external bus control signals are needed
so all of port E is configured for general-purpose I/O.
0 = Associated pin is a high-impedance input
1 = Associated pin is an output
PIPOE
5
0
1
0
0
1
Bus Control and Input/Output
NECLK
4
0
0
1
1
0
LSTRE
3
0
1
0
0
1
RDWE
2
0
1
0
0
1
CALE
MC68HC912D60A — Rev. 3.1
1
0
0
0
0
0
Freescale Semiconductor
DBENE
BIT 0
0
0
0
0
0
single chip
single chip
Expanded
Expanded
Peripheral
Special
Special
Normal
Normal
$000A