MC912D60CCPVE Freescale Semiconductor, MC912D60CCPVE Datasheet - Page 240

• Manufacturer Part Number: MC912D60CCPVE
• Description: IC MCU 16BIT 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MC912D60CCPVE

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: CAN, MI Bus, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x8/10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: HC912D
• Core: HC12
• Data Bus Width: 16 bit
• Data Ram Size: 2 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 86
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Enhanced Capture Timer
Technical Data
240
RDPT — Timer Port Drive Reduction
TCRE — Timer Counter Reset Enable
PR2, PR1, PR0 — Timer Prescaler Select
This bit reduces the effective output driver size which can reduce
power supply current and generated noise depending upon pin
loading.
This bit allows the timer counter to be reset by a successful output
compare 7 event. This mode of operation is similar to an up-counting
modulus counter.
If TC7 = $0000 and TCRE = 1, TCNT will stay at $0000 continuously.
If TC7 = $FFFF and TCRE = 1, TOF will never be set when TCNT is
reset from $FFFF to $0000.
These three bits specify the number of ÷2 stages that are to be
inserted between the module clock and the main timer counter.
The newly selected prescale factor will not take effect until the next
synchronized edge where all prescale counter stages equal zero.
0 = Normal output drive capability
1 = Enable output drive reduction function
0 = Counter reset inhibited and counter free runs
1 = Counter reset by a successful output compare 7
Enhanced Capture Timer
PR2
0
0
0
0
1
1
1
1
Table 14-3. Prescaler Selection
PR1
0
0
1
1
0
0
1
1
PR0
0
1
0
1
0
1
0
1
MC68HC912D60A — Rev. 3.1
Prescale
Factor
128
16
32
64
1
2
4
8
Freescale Semiconductor