EP4SGX360FH29C3N Altera, EP4SGX360FH29C3N Datasheet - Page 1035

• Manufacturer Part Number: EP4SGX360FH29C3N
• Description: IC STRATIX IV FPGA 360K 780HBGA
• Manufacturer: Altera
• Series: Stratix® IV GXr

Specifications of EP4SGX360FH29C3N

• Number Of Logic Elements/cells: 353600
• Number Of Labs/clbs: 14144
• Total Ram Bits: 22564
• Number Of I /o: 289
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-HBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Chapter 2: Transceiver Design Flow Guide for Stratix IV Devices
Example 1: Fibre Channel Protocol Application
Example 1: Fibre Channel Protocol Application
February 2011 Altera Corporation
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For more information about debugging Stratix IV GX transceivers, refer to
AN 553: Debugging
Assume that you want to implement a fibre channel protocol application using three
transceiver channels. Consider the following system requirements:
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Table 2–2
Table 2–2. Transceiver Channel Configuration for Example 1
Channels
Measure the increase in jitter at the near end and far end with one channel turned
on at a time if you have multiple transceiver channels connected to the upstream
system. This helps to observe the effect of cross talk from adjacent channels on the
victim channel.
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Ensure that the input voltage and duty cycle of the input reference clock source
provided to the transmitter PLLs meet the input reference clock requirements.
Check whether the voltage drop on the power supplies is within the specified
tolerance range.
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Check for periodic modulation of other frequency components on the transmit
data. Send a high-frequency pattern (1010) from the transmitter side and connect
the transmitter serial output to a spectrum analyzer.
You need three transceiver channels
All the channels need to be placed in the same transceiver block
All the channels need to have independent control to reset their PCS and PMA
functional blocks
0
1
2
Check the board layout and routing to ensure that you have implemented the
design practices to mitigate cross talk.
Measure the voltage at the via beneath the power supply pin using a
high-impedance probe.
Check whether the voltage regulator specifications meet the Stratix IV GX
power supply requirements.
Revisit the power distribution scheme for the supply voltage to ensure that it is
designed to handle the transient current requirements of the transceiver.
lists the transceiver channel configuration for Example 1.
For the tolerance values of the different power supplies, refer to the
Switching Characteristics for Stratix IV Devices
Receiver and Transmitter
Receiver and Transmitter
Mode of Operation
Transmitter Only
Transceivers.
FC1G (1.0625 Gbps)
FC4G (4.25 Gbps)
FC4G (4.25 Gbps)
Data Rate
chapter.
Stratix IV Device Handbook Volume 3
Clock Frequency
Input Reference
106.25
53.125
106.25
(MHz)
DC and
2–17