EP4SGX360FH29C3N Altera, EP4SGX360FH29C3N Datasheet - Page 684
EP4SGX360FH29C3N
Manufacturer Part Number
EP4SGX360FH29C3N
Description
IC STRATIX IV FPGA 360K 780HBGA
Manufacturer
Altera
Series
Stratix® IV GXr
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.EP4SGX110DF29C3N.pdf
(432 pages)
4.EP4SGX110DF29C3N.pdf
(22 pages)
5.EP4SGX110DF29C3N.pdf
(30 pages)
6.EP4SGX110DF29C3N.pdf
(72 pages)
Specifications of EP4SGX360FH29C3N
Number Of Logic Elements/cells
353600
Number Of Labs/clbs
14144
Total Ram Bits
22564
Number Of I /o
289
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-HBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
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Part Number:
EP4SGX360FH29C3N
Manufacturer:
Bussmann
Quantity:
40 000
Company:
Part Number:
EP4SGX360FH29C3N
Manufacturer:
ALTERA21
Quantity:
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2–12
Figure 2–7. FPGA Fabric PLLs-Transceiver PLLs Cascading Options Allowed in the 1517-Pin Package Devices
Note to
(1) ATX PLL L1 and ATX PLL R1 are not present in the EP4SGX230KF40 device.
Stratix IV Device Handbook Volume 2: Transceivers
Figure
FPGA Fabric PLLs-Transceiver PLLs Cascading in the 1517-Pin Package
Transceiver Block GXBL2
Transceiver Block GXBL0
Channel 1
Channel 0
Transceiver Block GXBL1
Channel 3
Channel 1
Channel 0
Channel 3
Channel 2
Channel 1
Channel 0
Channel 3
Channel 2
Channel 2
2–7:
ATX PLL L1 (6G) (1)
ATX PLL L0 (6G)
1
CMU1
CMU0
CMU1
CMU0
CMU1
CMU0
CDR
CDR
CDR
CDR
CDR
CDR
CDR
CDR
CDR
CDR
CDR
CDR
PLL
PLL
PLL
PLL
PLL
PLL
Figure 2–7
in the EP4SGX180HF40, EP4SGX230KF40, EP4SGX290KF40, EP4SGX360KF40, and
EP4SGX530KF40 devices.
For Stratix IV GT devices, FPGA fabric PLLs-Transceiver PLLs cascading is not
supported for the 10G ATX PLLs. For the EP4S40G2KF40, EP4S40G5KF40,
EP4S100G2KF40, and EP4S100G5KF40 devices, FPGA fabric PLLs-Transceiver PLLs
cascading for the 6G ATX PLLs and CMU PLLs is the same as the Stratix IV GX
devices in the 1517-pin package.
Cascade
Network
PLL
shows the FPGA fabric PLLs-Transceiver PLLs cascading options allowed
PLL_L2
PLL_L3
EP4SGX180HF40
EP4SGX230KF40
EP4SGX290KF40
EP4SGX360KF40
EP4SGX530KF40
PLL_R2
PLL_R3
Chapter 2: Transceiver Clocking in Stratix IV Devices
FPGA Fabric PLLs-Transceiver PLLs Cascading
Cascade
Network
PLL
February 2011 Altera Corporation
Transceiver Block GXBR1
Transceiver Block GXBR2
Transceiver Block GXBR0
ATX PLL R1 (6G) (1)
ATX PLL R0 (6G)
CMU0
CMU1
CDR
CDR
CMU1
CMU0
CDR
CDR
CDR
CDR
CDR
CMU1
CMU0
CDR
CDR
CDR
CDR
CDR
PLL
PLL
PLL
PLL
PLL
PLL
Channel 3
Channel 2
Channel 1
Channel 0
Channel 3
Channel 2
Channel 0
Channel 3
Channel 2
Channel 1
Channel 0
Channel 1
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