EP4SGX360FH29C3N Altera, EP4SGX360FH29C3N Datasheet - Page 481

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EP4SGX360FH29C3N

Manufacturer Part Number
EP4SGX360FH29C3N
Description
IC STRATIX IV FPGA 360K 780HBGA
Manufacturer
Altera
Series
Stratix® IV GXr

Specifications of EP4SGX360FH29C3N

Number Of Logic Elements/cells
353600
Number Of Labs/clbs
14144
Total Ram Bits
22564
Number Of I /o
289
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-HBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-

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0
Chapter 1: Transceiver Architecture in Stratix IV Devices
Transceiver Block Architecture
February 2011 Altera Corporation
Figure 1–33. AC-Coupled Link
The following protocols supported by Stratix IV GX and GT devices mandate
AC-coupled links:
Stratix IV GT devices allow the high-speed links to be AC-coupled for the entire data
rate range between 600 Mbps and 11.3 Gbps.
In a DC-coupled link, the transmitter DC V
The link V
off-chip receiver termination and biasing circuitry must ensure compatibility between
the transmitter and receiver V
PCIe
Gigabit Ethernet
Serial RapidIO
XAUI
SDI
DC-Coupled Links
Transmitter
CM
TX Termination
depends on the transmitter V
TX
V
CM
CM
.
Figure 1–34
Physical Medium
Physical Medium
CM
CM
is seen unblocked at the receiver buffer.
shows a DC-coupled link.
and the receiver V
AC Coupling
Capacitor
AC Coupling
Capacitor
Stratix IV Device Handbook Volume 2: Transceivers
RX
V
CM
RX Termination
CM
Receiver
. The on-chip or
1–37

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