EP4SGX360FH29C3N Altera, EP4SGX360FH29C3N Datasheet - Page 696
EP4SGX360FH29C3N
Manufacturer Part Number
EP4SGX360FH29C3N
Description
IC STRATIX IV FPGA 360K 780HBGA
Manufacturer
Altera
Series
Stratix® IV GXr
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.EP4SGX110DF29C3N.pdf
(432 pages)
4.EP4SGX110DF29C3N.pdf
(22 pages)
5.EP4SGX110DF29C3N.pdf
(30 pages)
6.EP4SGX110DF29C3N.pdf
(72 pages)
Specifications of EP4SGX360FH29C3N
Number Of Logic Elements/cells
353600
Number Of Labs/clbs
14144
Total Ram Bits
22564
Number Of I /o
289
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-HBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Available stocks
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Part Number:
EP4SGX360FH29C3N
Manufacturer:
Bussmann
Quantity:
40 000
Company:
Part Number:
EP4SGX360FH29C3N
Manufacturer:
ALTERA21
Quantity:
53
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2–24
Stratix IV Device Handbook Volume 2: Transceivers
The transmitter channel datapath clocking in modes other than Basic (PMA Direct)
mode depends on whether the transmitter channel is configured in non-bonded or
bonded mode.
Non-Bonded Channel Configurations
The following modes other than Basic (PMA Direct) functional mode have a
non-bonded transmitter channel configuration:
■
■
■
■
■
■
■
■
Use the CMU channels to generate transceiver clocks for all the non-bonded
functional modes listed above. Additionally, you may use the ATX PLLs if the
configured data rate falls within the ATX PLL data rate range specified in the
Switching Characteristics for Stratix IV Devices
PCIe ×1—Gen1 and Gen2
Gigabit Ethernet (GIGE)
Serial RapidIO
SONET/SDH
SDI
(OIF) CEI PHY Interface
Basic (except Basic ×4 and Basic ×8 modes)
Deterministic Latency
chapter.
Chapter 2: Transceiver Clocking in Stratix IV Devices
Transceiver Channel Datapath Clocking
February 2011 Altera Corporation
DC and
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