EP4SGX360FH29C3N Altera, EP4SGX360FH29C3N Datasheet - Page 516

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EP4SGX360FH29C3N

Manufacturer Part Number
EP4SGX360FH29C3N
Description
IC STRATIX IV FPGA 360K 780HBGA
Manufacturer
Altera
Series
Stratix® IV GXr

Specifications of EP4SGX360FH29C3N

Number Of Logic Elements/cells
353600
Number Of Labs/clbs
14144
Total Ram Bits
22564
Number Of I /o
289
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-HBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-

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0
1–72
Stratix IV Device Handbook Volume 2: Transceivers
The generic receiver polarity inversion feature is different from the PCIe 8B/10B
polarity inversion feature. The generic receiver polarity inversion feature inverts the
polarity of the data bits at the input of the word aligner and is not available in PCIe
mode. The PCIe 8B/10B polarity inversion feature inverts the polarity of the data bits
at the input of the 8B/10B decoder and is available only in PCIe mode.
Figure 1–54
double-width datapath configurations.
Figure 1–54. Receiver Polarity Inversion in Single-Width and Double Width Mode
shows the receiver polarity inversion feature in single-width and
Double-Width Configuration
Double-Width Configuration
Output from Deserializer
Single-Width Configuration
Single-Width Configuration
1
0
1
0
0
0
0
0
1
1
0
1
0
1
1
1
1
1
0
0
rx_invpolarity = High
rx_invpolarity = High
Input to Word Aligner
Chapter 1: Transceiver Architecture in Stratix IV Devices
0
1
0
1
1
1
1
1
0
0
1
0
1
0
0
0
0
0
1
1
To the Word Aligner
To the Word Aligner
February 2011 Altera Corporation
Transceiver Block Architecture

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