EP4SGX360FH29C3N Altera, EP4SGX360FH29C3N Datasheet - Page 425

• Manufacturer Part Number: EP4SGX360FH29C3N
• Description: IC STRATIX IV FPGA 360K 780HBGA
• Manufacturer: Altera
• Series: Stratix® IV GXr

Specifications of EP4SGX360FH29C3N

• Number Of Logic Elements/cells: 353600
• Number Of Labs/clbs: 14144
• Total Ram Bits: 22564
• Number Of I /o: 289
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-HBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

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SIV51013-3.2
Overview
Stratix IV Device Handbook Volume 1
April 2011
February 2011
SIV51013-3.2
This chapter describes power management in Stratix
offer programmable power technology options for low-power operation. You can use
these options, along with speed grade choices, in different permutations to give the
best power and performance combination. For thermal management, use the
Stratix IV internal temperature sensing device (TSD) with built-in analog-to-digital
converter (ADC) circuitry or external TSD with an external temperature sensor to
easily incorporate this feature in your designs. Being able to monitor the junction
temperature of the device at any time also offers the ability to control air flow to the
device and save power for the whole system.
Stratix IV FPGAs deliver a breakthrough level of system bandwidth and power
efficiency for high-end applications, allowing you to innovate without compromise.
Stratix IV devices use advanced power management techniques to enable both
density and performance increases while simultaneously reducing power dissipation.
The total power of an FPGA includes static and dynamic power.
■
■
Equation 13–1. Dynamic Power Equation
Note to
(1) P = power; C = load capacitance; and V = supply voltage level.
Equation 13–1
voltage to lower dynamic power consumption by the square value of the voltage
difference. Stratix IV devices minimize static and dynamic power with advanced
process optimizations and programmable power technology. These technologies
enable Stratix IV designs to optimally meet design-specific performance requirements
with the lowest possible power.
The Quartus
ensure performance is met at the lowest power consumption. This automatic process
allows you to concentrate on the functionality of the design instead of the power
consumption of the design.
Static power is the power consumed by the FPGA when it is configured but no
clocks are operating.
Dynamic power is the switching power when the device is configured and
running. You configure dynamic power with the equation shown in
Equation
Equation
®
13–1.
13–1:
II software optimizes all designs with Stratix IV power technology to
shows that frequency is design dependant. However, you can vary the
13. Power Management in Stratix IV
P
=
1
-- - CV
2
(Note 1)
2
×
frequency
®
IV devices. Stratix IV devices
Devices
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