EP4SGX360FH29C3N Altera, EP4SGX360FH29C3N Datasheet - Page 767

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EP4SGX360FH29C3N

Manufacturer Part Number
EP4SGX360FH29C3N
Description
IC STRATIX IV FPGA 360K 780HBGA
Manufacturer
Altera
Series
Stratix® IV GXr

Specifications of EP4SGX360FH29C3N

Number Of Logic Elements/cells
353600
Number Of Labs/clbs
14144
Total Ram Bits
22564
Number Of I /o
289
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-HBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-

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0
Chapter 3: Configuring Multiple Protocols and Data Rates in Stratix IV Devices
Combining Transceiver Instances in Multiple Transceiver Blocks
Combining Transceiver Instances in Multiple Transceiver Blocks
February 2011 Altera Corporation
Figure 3–4
Figure 3–4. Combined Transceiver Instances After Compilation for Example 3
The method to instantiate multiple transceiver channels using a single ALTGX
instance is described in
following section describes the method to instantiate multiple transceiver channels
using multiple transceiver blocks.
When you create a transceiver instance that has more than four transceiver channels
(assuming that the instance is created in non-Basic (PMA Direct) functional mode
which requires regular channels), the Quartus II software attempts to combine the
transceiver channels in multiple transceiver blocks. This is shown in the following
examples.
shows the transceiver channel instances after compilation.
“Creating Transceiver Channel Instances” on page
Inst 2
Effective Data Rate: 1.25 Gbps
Inst 3
Effective Data Rate: 2 Gbps
Inst 0
Effective Data Rate: 3.25 Gbps
Inst 1
Effective Data Rate: 2.5 Gbps
Transceiver Channel1
Transceiver Channel0
TX Loc Div: /1
TX Loc Div: /1
Transceiver Block
TX Channel
RX Channel
Base Data Rate:
Base Data Rate:
RX Channel
TX Channel
3.125 Gbps
1.25 Gbps
CMU PLL
CMU PLL
Stratix IV Device Handbook Volume 2: Transceivers
3–3. The
3–13

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